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microcode_ctl-2.1-73.13.el7_9 RPM for x86_64

From Updates for CentOS 7.9.2009 for x86_64 / Packages

Name: microcode_ctl Distribution: Unknown
Version: 2.1 Vendor: CentOS
Release: 73.13.el7_9 Build date: Tue Apr 5 18:25:23 2022
Group: System Environment/Base Build host: x86-02.bsys.centos.org
Size: 5213465 Source RPM: microcode_ctl-2.1-73.13.el7_9.src.rpm
Packager: CentOS BuildSystem <http://bugs.centos.org>
Url: https://pagure.io/microcode_ctl
Summary: Tool to transform and deploy CPU microcode update for x86.
The microcode_ctl utility is a companion to the microcode driver written
by Tigran Aivazian <tigran@aivazian.fsnet.co.uk>.

The microcode update is volatile and needs to be uploaded on each system
boot i.e. it doesn't reflash your cpu permanently, reboot and it reverts
back to the old microcode.

Provides

Requires

License

GPLv2+ and Redistributable, no modification permitted

Changelog

* Thu Feb 10 2022 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-73.13
  - Update Intel CPU microcode to microcode-20220207 release:
    - Fixes in releasenote.md file.
* Mon Feb 07 2022 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-73.12
  - Update Intel CPU microcode to microcode-20220204 release, addresses
    CVE-2021-0127, CVE-2021-0145, CVE-2021-33120 (#2051547, #2049549, #2049566):
    - Removal of 06-86-04/0x01 (SNR B0) microcode at revision 0xb00000f;
    - Removal of 06-86-05/0x01 (SNR B1) microcode (in intel-ucode/06-86-04)
      at revision 0xb00000f;
    - Removal of 06-86-04/0x01 (SNR B0) microcode (in intel-ucode/06-86-05)
      at revision 0xb00000f;
    - Removal of 06-86-05/0x01 (SNR B1) microcode at revision 0xb00000f;
    - Update of 06-4e-03/0xc0 (SKL-U/U 2+3e/Y D0/K1) microcode (in
      intel-06-4e-03/intel-ucode/06-4e-03) from revision 0xea up to 0xec;
    - Update of 06-4f-01/0xef (BDX-E/EP/EX/ML B0/M0/R0) microcode (in
      intel-06-4f-01/intel-ucode/06-4f-01) from revision 0xb00003e up
      to 0xb000040;
    - Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in
      intel-06-55-04/intel-ucode/06-55-04) from revision 0x2006b06 up
      to 0x2006c0a;
    - Update of 06-5e-03/0x36 (SKL-H/S/Xeon E3 N0/R0/S0) microcode (in
      intel-06-5e-03/intel-ucode/06-5e-03) from revision 0xea up to 0xec;
    - Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in
      intel-06-8c-01/intel-ucode/06-8c-01) from revision 0x88 up to 0x9a;
    - Update of 06-3f-02/0x6f (HSX-E/EN/EP/EP 4S C0/C1/M1/R2) microcode
      from revision 0x46 up to 0x49;
    - Update of 06-3f-04/0x80 (HSX-EX E0) microcode from revision 0x19 up
      to 0x1a;
    - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x100015b
      up to 0x100015c;
    - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003102
      up to 0x400320a;
    - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision
      0x5003102 up to 0x500320a;
    - Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002302
      up to 0x7002402;
    - Update of 06-56-03/0x10 (BDX-DE V2/V3) microcode from revision
      0x700001b up to 0x700001c;
    - Update of 06-56-04/0x10 (BDX-DE Y0) microcode from revision 0xf000019
      up to 0xf00001a;
    - Update of 06-56-05/0x10 (BDX-NS A0/A1, HWL A1) microcode from revision
      0xe000012 up to 0xe000014;
    - Update of 06-5c-09/0x03 (APL D0) microcode from revision 0x44 up
      to 0x46;
    - Update of 06-5c-0a/0x03 (APL B1/F1) microcode from revision 0x20 up
      to 0x24;
    - Update of 06-5f-01/0x01 (DNV B0) microcode from revision 0x34 up
      to 0x36;
    - Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd0002a0
      up to 0xd000331;
    - Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x36 up
      to 0x38;
    - Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x1a up
      to 0x1c;
    - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xa6
      up to 0xa8;
    - Update of 06-8a-01/0x10 (LKF B2/B3) microcode from revision 0x2a up
      to 0x2d;
    - Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x16 up
      to 0x22;
    - Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x2c up
      to 0x3c;
    - Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode from revision 0xea
      up to 0xec;
    - Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode from revision
      0xea up to 0xec;
    - Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode from
      revision 0xea up to 0xec;
    - Update of 06-8e-0b/0xd0 (WHL-U W0) microcode from revision 0xea up
      to 0xec;
    - Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0)
      microcode from revision 0xea up to 0xec;
    - Update of 06-96-01/0x01 (EHL B1) microcode from revision 0x11 up
      to 0x15;
    - Update of 06-9c-00/0x01 (JSL A0/A1) microcode from revision 0x1d up
      to 0x2400001f;
    - Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode from
      revision 0xea up to 0xec;
    - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode from revision
      0xea up to 0xec;
    - Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode from revision 0xea
      up to 0xec;
    - Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode from revision
      0xea up to 0xec;
    - Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode from revision
      0xea up to 0xec;
    - Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xea up
      to 0xec;
    - Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xea
      up to 0xec;
    - Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xec
      up to 0xee;
    - Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xe8
      up to 0xea;
    - Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision
      0xea up to 0xec;
    - Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x40 up
      to 0x50.
* Fri Jul 23 2021 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-73.11
  - Update Intel CPU microcode to microcode-20210608 release:
    - Fixes in releasenote.md file.
* Fri Jul 23 2021 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-73.10
  - Make intel-06-2d-07, intel-06-4e-03, intel-06-4f-01, intel-06-55-04,
    intel-06-5e-03, intel-06-8c-01, intel-06-8e-9e-0x-0xca,
    and intel-06-8e-9e-0x-dell caveats dependent on intel caveat.
  - Enable 06-8c-01 microcode update by default.
  - Enable 06-5e-03 microcode update by default (#1897684).
* Thu May 27 2021 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-73.9
  - Update Intel CPU microcode to microcode-20210525 release, addresses
    CVE-2020-24489, CVE-2020-24511, CVE-2020-24512, and CVE-2020-24513
    (#1962659, #1962709, #1962729, #1962675):
    - Addition of 06-55-05/0xb7 (CLX-SP A0) microcode at revision 0x3000010;
    - Addition of 06-6a-05/0x87 (ICX-SP C0) microcode at revision 0xc0002f0;
    - Addition of 06-6a-06/0x87 (ICX-SP D0) microcode at revision 0xd0002a0;
    - Addition of 06-86-04/0x01 (SNR B0) microcode at revision 0xb00000f;
    - Addition of 06-86-05/0x01 (SNR B1) microcode (in intel-ucode/06-86-04)
      at revision 0xb00000f;
    - Addition of 06-86-04/0x01 (SNR B0) microcode (in intel-ucode/06-86-05)
      at revision 0xb00000f;
    - Addition of 06-86-05/0x01 (SNR B1) microcode at revision 0xb00000f;
    - Addition of 06-8c-02/0xc2 (TGL-R C0) microcode at revision 0x16;
    - Addition of 06-8d-01/0xc2 (TGL-H R0) microcode at revision 0x2c;
    - Addition of 06-96-01/0x01 (EHL B1) microcode at revision 0x11;
    - Addition of 06-9c-00/0x01 (JSL A0/A1) microcode at revision 0x1d;
    - Addition of 06-a7-01/0x02 (RKL-S B0) microcode at revision 0x40;
    - Update of 06-4e-03/0xc0 (SKL-U/U 2+3e/Y D0/K1) microcode (in
      intel-06-4e-03/intel-ucode/06-4e-03) from revision 0xe2 up to 0xea;
    - Update of 06-4f-01/0xef (BDX-E/EP/EX/ML B0/M0/R0) microcode (in
      intel-06-4f-01/intel-ucode/06-4f-01) from revision 0xb000038 up
      to 0xb00003e;
    - Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in
      intel-06-55-04/intel-ucode/06-55-04) from revision 0x2006a0a up
      to 0x2006b06;
    - Update of 06-5e-03/0x36 (SKL-H/S/Xeon E3 N0/R0/S0) microcode (in
      intel-06-5e-03/intel-ucode/06-5e-03) from revision 0xe2 up to 0xea;
    - Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in
      intel-06-8c-01/intel-ucode/06-8c-01) from revision 0x68 up to 0x88;
    - Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xde up
      to 0xea;
    - Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xde up
      to 0xea;
    - Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0a) from revision 0xe0 up
      to 0xea;
    - Update of 06-8e-0b/0xd0 (WHL-U W0) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0b) from revision 0xde up
      to 0xea;
    - Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0)
      microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0c) from
      revision 0xde up to 0xea;
    - Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-9e-09) from revision 0xde up
      to 0xea;
    - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0a) from revision 0xde up
      to 0xea;
    - Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0b) from revision 0xde up
      to 0xea;
    - Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0c) from revision 0xde up
      to 0xea;
    - Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0d) from revision 0xde up
      to 0xea;
    - Update of 06-3f-02/0x6f (HSX-E/EN/EP/EP 4S C0/C1/M1/R2) microcode
      from revision 0x44 up to 0x46;
    - Update of 06-3f-04/0x80 (HSX-EX E0) microcode from revision 0x16 up
      to 0x19;
    - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x1000159
      up to 0x100015b;
    - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003006
      up to 0x4003102;
    - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision
      0x5003006 up to 0x5003102;
    - Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x700001e
      up to 0x7002302;
    - Update of 06-56-03/0x10 (BDX-DE V2/V3) microcode from revision
      0x7000019 up to 0x700001b;
    - Update of 06-56-04/0x10 (BDX-DE Y0) microcode from revision 0xf000017
      up to 0xf000019;
    - Update of 06-56-05/0x10 (BDX-NS A0/A1, HWL A1) microcode from revision
      0xe00000f up to 0xe000012;
    - Update of 06-5c-09/0x03 (APL D0) microcode from revision 0x40 up
      to 0x44;
    - Update of 06-5c-0a/0x03 (APL B1/F1) microcode from revision 0x1e up
      to 0x20;
    - Update of 06-5f-01/0x01 (DNV B0) microcode from revision 0x2e up
      to 0x34;
    - Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x34 up
      to 0x36;
    - Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x18 up
      to 0x1a;
    - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xa0
      up to 0xa6;
    - Update of 06-8a-01/0x10 (LKF B2/B3) microcode from revision 0x28 up
      to 0x2a;
    - Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xe0 up
      to 0xea;
    - Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xe0
      up to 0xea;
    - Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xe0
      up to 0xec;
    - Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xe0
      up to 0xe8;
    - Update of 06-a6-01/0x80 (CML-U 6+2 v2 K0) microcode from revision
      0xe0 up to 0xea.
* Wed Feb 17 2021 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-73.8
  - Update Intel CPU microcode to microcode-20210216 release (#1905111):
    - Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in
      intel-06-55-04/intel-ucode/06-55-04) from revision 0x2006a08 up
      to 0x2006a0a;
    - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003003
      up to 0x4003006;
    - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision
      0x5003003 up to 0x5003006.
* Wed Feb 17 2021 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-73.7
  - Remove 06-55-04/06-55-06/06-55-07 (SKX-SP/CLX-SP) microcode-20201110 caveats.
* Thu Feb 11 2021 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-73.6
  - Backport check_dmi_val to check_caveats from RHEL 8.
* Fri Dec 11 2020 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-73.5
  - Do not use "grep -q" in a pipe in check_caveats.
  - Add 06-55-04/06-55-06/06-55-07 (SKX-SP/CLX-SP) microcode-20201110 caveats
    (#1905111).
* Fri Nov 13 2020 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-73.4
  - Update Intel CPU microcode to microcode-20201112 release:
    - Addition of 06-8a-01/0x10 (LKF B2/B3) microcode at revision 0x28;
    - Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x32 up
      to 0x34;
    - Updated releasenote file.
* Fri Nov 13 2020 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-73.3
  - Disable 06-8c-01 (TGL-UP3/UP4 B1) microcode update by default.
* Fri Oct 30 2020 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-73.2
  - Update Intel CPU microcode to microcode-20201027 release, addresses
    CVE-2020-8694, CVE-2020-8695, CVE-2020-8696, CVE-2020-8698
    (#1893261, #1893249, #1893229):
    - Addition of 06-55-0b/0xbf (CPX-SP A1) microcode at revision 0x700001e;
    - Addition of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode at revision 0x68;
    - Addition of 06-a5-02/0x20 (CML-H R1) microcode at revision 0xe0;
    - Addition of 06-a5-03/0x22 (CML-S 6+2 G1) microcode at revision 0xe0;
    - Addition of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode at revision 0xe0;
    - Addition of 06-a6-01/0x80 (CML-U 6+2 v2 K0) microcode at revision
      0xe0;
    - Update of 06-4e-03/0xc0 (SKL-U/U 2+3e/Y D0/K1) microcode (in
      intel-06-4e-03/intel-ucode/06-4e-03) from revision 0xdc up to 0xe2;
    - Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in
      intel-06-55-04/intel-ucode/06-55-04) from revision 0x2006906 up
      to 0x2006a08;
    - Update of 06-5e-03/0x36 (SKL-H/S/Xeon E3 N0/R0/S0) microcode (in
      intel-06-5e-03/intel-ucode/06-5e-03) from revision 0xdc up to 0xe2;
    - Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xd6 up
      to 0xde;
    - Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xd6 up
      to 0xde;
    - Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0a) from revision 0xd6 up
      to 0xe0;
    - Update of 06-8e-0b/0xd0 (WHL-U W0) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0b) from revision 0xd6 up
      to 0xde;
    - Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0)
      microcode (in intel-06-8e-9e-0x-dell/intel-ucode/06-8e-0c) from
      revision 0xd6 up to 0xde;
    - Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-9e-09) from revision 0xd6 up
      to 0xde;
    - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0a) from revision 0xd6 up
      to 0xde;
    - Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0b) from revision 0xd6 up
      to 0xde;
    - Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0c) from revision 0xd6 up
      to 0xde;
    - Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode (in
      intel-06-8e-9e-0x-dell/intel-ucode/06-9e-0d) from revision 0xd6 up
      to 0xde;
    - Update of 06-3f-02/0x6f (HSX-E/EN/EP/EP 4S C0/C1/M1/R2) microcode
      from revision 0x43 up to 0x44;
    - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x1000157
      up to 0x1000159;
    - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4002f01
      up to 0x4003003;
    - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision
      0x5002f01 up to 0x5003003;
    - Update of 06-5c-09/0x03 (APL D0) microcode from revision 0x38 up
      to 0x40;
    - Update of 06-5c-0a/0x03 (APL B1/F1) microcode from revision 0x16 up
      to 0x1e;
    - Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x16 up
      to 0x18;
    - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0x78
      up to 0xa0;
    - Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xca
      up to 0xe0.
* Fri Oct 30 2020 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-73.1
  - Add README file to the documentation directory.
  - Add publicly-sourced codenames list to supply to gen_provides.sh; update
    the latter to handle the somewhat different format.
  - Add SUMMARY.intel-ucode file containing metadata information from
    the microcode file headers.
* Mon Jun 15 2020 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-73
  - Update Intel CPU microcode to microcode-20200609 release (#1826589):
    - Fixed a typo in the release note file.
* Mon Jun 15 2020 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-72
  - Enable 06-2d-07 (SNB-E/EN/EP) caveat by default (#1846023).
* Mon Jun 15 2020 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-71
  - Enable 06-55-04 (SKL-X/W) caveat by default.
* Sun Jun 14 2020 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-70
  - Do not update 06-4e-03 (SKL-U/Y) and 06-5e-03 (SKL-H/S/Xeon E3 v5) to revision
    0xdc, use 0xd6 by default (#1846133).
* Thu Jun 04 2020 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-69
  - Avoid temporary file creation, used for here-documents in check_caveats.
* Wed Jun 03 2020 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-68
  - Update Intel CPU microcode to microcode-20200602 release, addresses
    CVE-2020-0543, CVE-2020-0548, CVE-2020-0549 (#1795352, #1795355, #1827190):
    - Update of 06-3c-03/0x32 (HSW C0) microcode from revision 0x27 up to 0x28;
    - Update of 06-3d-04/0xc0 (BDW-U/Y E0/F0) microcode from revision 0x2e
      up to 0x2f;
    - Update of 06-45-01/0x72 (HSW-U C0/D0) microcode from revision 0x25
      up to 0x26;
    - Update of 06-46-01/0x32 (HSW-H C0) microcode from revision 0x1b up to 0x1c;
    - Update of 06-47-01/0x22 (BDW-H/Xeon E3 E0/G0) microcode from revision 0x21
      up to 0x22;
    - Update of 06-4e-03/0xc0 (SKL-U/Y D0) microcode from revision 0xd6
      up to 0xdc;
    - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x1000151
      up to 0x1000157;
    - Update of 06-55-04/0xb7 (SKX-SP H0/M0/U0, SKX-D M1) microcode
      (in intel-06-55-04/intel-ucode/06-55-04) from revision 0x2000065
      up to 0x2006906;
    - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x400002c
      up to 0x4002f01;
    - Update of 06-55-07/0xbf (CLX-SP B1) microcode from revision 0x500002c
      up to 0x5002f01;
    - Update of 06-5e-03/0x36 (SKL-H/S R0/N0) microcode from revision 0xd6
      up to 0xdc;
    - Update of 06-8e-09/0x10 (AML-Y22 H0) microcode from revision 0xca
      up to 0xd6;
    - Update of 06-8e-09/0xc0 (KBL-U/Y H0) microcode from revision 0xca
      up to 0xd6;
    - Update of 06-8e-0a/0xc0 (CFL-U43e D0) microcode from revision 0xca
      up to 0xd6;
    - Update of 06-8e-0b/0xd0 (WHL-U W0) microcode from revision 0xca
      up to 0xd6;
    - Update of 06-8e-0c/0x94 (AML-Y42 V0, CML-Y42 V0, WHL-U V0) microcode
      from revision 0xca up to 0xd6;
    - Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode from revision
      0xca up to 0xd6;
    - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E3 U0) microcode from revision 0xca
      up to 0xd6;
    - Update of 06-9e-0b/0x02 (CFL-S B0) microcode from revision 0xca up to 0xd6;
    - Update of 06-9e-0c/0x22 (CFL-H/S P0) microcode from revision 0xca
      up to 0xd6;
    - Update of 06-9e-0d/0x22 (CFL-H R0) microcode from revision 0xca up to 0xd6.
* Fri May 22 2020 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-67
  - Update Intel CPU microcode to microcode-20200520 release (#1783103):
    - Update of 06-2d-06/0x6d (SNB-E/EN/EP C1/M0) microcode from revision 0x61f
      up to 0x621;
    - Update of 06-2d-07/0x6d (SNB-E/EN/EP C2/M1) microcode from revision 0x718
      up to 0x71a.
* Thu May 14 2020 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-66
  - Update Intel CPU microcode to microcode-20200508 release (#1835549):
    - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0x46
      up to 0x78.
  - Change the URL in the intel-microcode2ucode.8 to point to the GitHub
    repository since the microcode download section at Intel Download Center
    does not exist anymore.
* Thu May 07 2020 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-65
  - Narrow down SKL-SP/W/X blacklist to exclude Server/FPGA/Fabric segment
    models (#1833037).
* Wed Apr 29 2020 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-64
  - Re-generate initramfs not only for the currently running kernel,
    but for several recently installed kernels as well (#1773347).
* Mon Dec 09 2019 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-63
  - Avoid find being SIGPIPE'd on early "grep -q" exit in the dracut script
    (#1781332).
* Mon Dec 09 2019 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-62
  - Update stale posttrans dependency, add triggers for proper handling
    of the debug kernel flavour along with kernel-rt (#1780257).
* Wed Nov 20 2019 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-61
  - Do not update 06-55-04 (SKL-SP/W/X) to revision 0x2000065, use 0x2000064
    by default (#1774329).
* Sat Nov 16 2019 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-60
  - Update Intel CPU microcode to microcode-20191115 release:
    - Update of 06-4e-03/0xc0 (SKL-U/Y D0) from revision 0xd4 up to 0xd6;
    - Update of 06-5e-03/0x36 (SKL-H/S/Xeon E3 R0/N0) from revision 0xd4
      up to 0xd6;
    - Update of 06-8e-09/0x10 (AML-Y 2+2 H0) from revision 0xc6 up to 0xca;
    - Update of 06-8e-09/0xc0 (KBL-U/Y H0) from revision 0xc6 up to 0xca;
    - Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0) from revision 0xc6 up to 0xca;
    - Update of 06-8e-0b/0xd0 (WHL-U W0) from revision 0xc6 up to 0xca;
    - Update of 06-8e-0c/0x94 (AML-Y V0, CML-U 4+2 V0, WHL-U V0) from revision
      0xc6 up to 0xca;
    - Update of 06-9e-09/0x2a (KBL-G/X H0, KBL-H/S/Xeon E3 B0) from revision 0xc6
      up to 0xca;
    - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) from revision 0xc6 up to 0xca;
    - Update of 06-9e-0b/0x02 (CFL-S B0) from revision 0xc6 up to 0xca;
    - Update of 06-9e-0c/0x22 (CFL-S/Xeon E P0) from revision 0xc6 up to 0xca;
    - Update of 06-9e-0d/0x22 (CFL-H/S R0) from revision 0xc6 up to 0xca;
    - Update of 06-a6-00/0x80 (CML-U 6+2 A0) from revision 0xc6 up to 0xca.
* Fri Nov 15 2019 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-59
  - Update Intel CPU microcode to microcode-20191113 release:
    - Update of 06-9e-0c (CFL-H/S P0) microcode from revision 0xae up to 0xc6.
  - Drop 0001-releasenote-changes-summary-fixes.patch.
* Tue Nov 12 2019 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-58
  - Package the publicy available microcode-20191112 release (#1755025):
    - Addition of 06-4d-08/0x1 (AVN B0/C0) microcode at revision 0x12d;
    - Addition of 06-55-06/0xbf (CSL-SP B0) microcode at revision 0x400002c;
    - Addition of 06-7a-08/0x1 (GLK R0) microcode at revision 0x16;
    - Update of 06-55-03/0x97 (SKL-SP B1) microcode from revision 0x1000150
      up to 0x1000151;
    - Update of 06-55-04/0xb7 (SKL-SP H0/M0/U0, SKL-D M1) microcode from revision
      0x2000064 up to 0x2000065;
    - Update of 06-55-07/0xbf (CSL-SP B1) microcode from revision 0x500002b
      up to 0x500002c;
    - Update of 06-7a-01/0x1 (GLK B0) microcode from revision 0x2e up to 0x32;
  - Include 06-9e-0c (CFL-H/S P0) microcode from the microcode-20190918 release.
  - Correct the releasenote file (0001-releasenote-changes-summary-fixes.patch).
  - Update README.caveats with the link to the new Knowledge Base article.
* Thu Nov 07 2019 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-57
  - Intel CPU microcode update to 20191112, addresses CVE-2017-5715,
    CVE-2019-0117, CVE-2019-11135, CVE-2019-11139 (#1755025, #1764058, #1764071,
      - Addition of 06-a6-00/0x80 (CML-U 6+2 A0) microcode at revision 0xc6;
    - Addition of 06-66-03/0x80 (CNL-U D0) microcode at revision 0x2a;
    - Addition of 06-55-03/0x97 (SKL-SP B1) microcode at revision 0x1000150;
    - Addition of 06-7e-05/0x80 (ICL-U/Y D1) microcode at revision 0x46;
    - Update of 06-4e-03/0xc0 (SKL-U/Y D0) microcode from revision 0xcc to 0xd4;
    - Update of 06-5e-03/0x36 (SKL-H/S/Xeon E3 R0/N0) microcode from revision 0xcc
      to 0xd4
    - Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode from revision 0xb4 to 0xc6;
    - Update of 06-8e-09/0xc0 (KBL-U/Y H0) microcode from revision 0xb4 to 0xc6;
    - Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0) microcode from revision 0xb4
      to 0xc6;
    - Update of 06-8e-0b/0xd0 (WHL-U W0) microcode from revision 0xb8 to 0xc6;
    - Update of 06-8e-0c/0x94 (AML-Y V0) microcode from revision 0xb8 to 0xc6;
    - Update of 06-8e-0c/0x94 (CML-U 4+2 V0) microcode from revision 0xb8 to 0xc6;
    - Update of 06-8e-0c/0x94 (WHL-U V0) microcode from revision 0xb8 to 0xc6;
    - Update of 06-9e-09/0x2a (KBL-G/X H0) microcode from revision 0xb4 to 0xc6;
    - Update of 06-9e-09/0x2a (KBL-H/S/Xeon E3 B0) microcode from revision 0xb4
      to 0xc6;
    - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode from revision 0xb4
      to 0xc6;
    - Update of 06-9e-0b/0x02 (CFL-S B0) microcode from revision 0xb4 to 0xc6;
    - Update of 06-9e-0d/0x22 (CFL-H R0) microcode from revision 0xb8 to 0xc6.
* Thu Oct 10 2019 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-56
  - Rework dracut hook to address dracut's early initramfs generation
    behaviour (#1769413).
* Sun Oct 06 2019 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-55
  - Do not update 06-2d-07 (SNB-E/EN/EP) to revision 0x718, use 0x714
    by default.
* Thu Sep 19 2019 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-54
  - Intel CPU microcode update to 20190918.
  - Add new disclaimer, generated based on relevant caveats.
  - Resolves: #1753541.
* Wed Jun 19 2019 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-53
  - Intel CPU microcode update to 20190618.
  - Resolves: #1717241.
* Sun Jun 02 2019 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-52
  - Remove disclaimer, as it is not as important now to justify kmsg/log
    pollution; its contents are partially adopted in README.caveats.
* Mon May 20 2019 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-51
  - Intel CPU microcode update to 20190514a.
  - Resolves: #1711941.
* Thu May 09 2019 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-50
  - Intel CPU microcode update to 20190507_Public_DEMO.
  - Resolves: #1697904.
* Mon Apr 15 2019 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-49
  - Intel CPU microcode update to 20190312.
  - Add "Provides:" tags generation.
  - Resolves: #1697904.
* Thu Sep 20 2018 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-48
  - Fix %postun script (#1628629)
* Wed Sep 05 2018 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-47
  - Add 7.3.z kernel version to kernel_early configuration.
* Thu Aug 30 2018 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-46
  - Fix dracut module checks in Host-Only mode.
* Thu Aug 30 2018 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-45
  - Disable 06-4f-01 microcode in config (#1623630).
* Tue Aug 28 2018 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-44
  - Intel CPU microcode update to 20180807a.
  - Add README.caveats documentation file.
  - Add intel-microcode2ucode manual page.
  - Add check for early microcode load, use it in microcode_ctl dracut module.
  - Resolves: #1596627.
* Mon Aug 20 2018 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-43
  - Check that the currently running kernel is installed before
    running dracut -f.
* Thu Aug 16 2018 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-42
  - Drop "hypervisor" /proc/cpuinfo flag check.
* Thu Aug 09 2018 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-41
  - Intel CPU microcode update to 20180807.
  - Resolves: #1614422
* Mon Aug 06 2018 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-40
  - Add an ability to disable "hypervisor" /proc/cpuinfo flag check.
* Fri Jul 27 2018 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-39
  - Provide %attr for the ghosted /lib/firmware/intel-ucode.
* Thu Jul 26 2018 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-38
  - Remove model name blacklists from caveats configuration files.
  - Resolves: #1596627
* Wed Jul 25 2018 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-37
  - Add model name blacklist infrastructure.
  - Store Intel ucode files in /usr/share/microcode_ctl; do not populate them
    in a virtualised environment.
  - Resolves: #1596627
* Fri Jul 20 2018 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-35
  - Add intel-microcode2ucode back
  - Resolves: #1574582
* Fri Jul 20 2018 Eugene Syromiatnikov <esyr@redhat.com> - 2:2.1-34
  - Update to upstream 2.1-18. Intel CPU microcode update to 20180703.
  - Add infrastructure for handling kernel-version-dependant microcode.
  - Resolves: #1574582
* Wed Jun 13 2018 Petr Oros <poros@redhat.com> - 2.1-33
  - CVE-2018-3639 hw: cpu: speculative store bypass
  - Resolves: #1495071
* Mon Jun 11 2018 Petr Oros <poros@redhat.com> - 2.1-32
  - Fix: Operation not permitted when installing microcode_ctl
  - Resolves: #1584247
* Tue May 15 2018 Petr Oros <poros@redhat.com> - 2.1-31
  - Update disclaimer text
  - Resolves: #1574574
* Mon May 07 2018 Petr Oros <poros@redhat.com> - 2.1-30
  - Intel CPU microcode update to 20180425.
  - Resolves: #1574574
* Fri Jan 12 2018 Petr Oros <poros@redhat.com> - 2.1-29
  - Revert Microcode from Intel for Side Channel attack
  - Resolves: #1533939
* Fri Jan 12 2018 Petr Oros <poros@redhat.com> - 2.1-29
  - Don't run dracut if not on a live system
  - Resolves: #1530400
* Tue Jan 09 2018 Petr Oros <poros@redhat.com> - 2.1-28
  - Remove old binary tool
  - Resolves: #1527360
* Tue Jan 09 2018 Petr Oros <poros@redhat.com> - 2.1-27
  - Update to upstream 2.1-15. Intel CPU microcode update to 20180108.
  - Resolves: #1527360
* Fri Dec 15 2017 Petr Oros <poros@redhat.com> - 2.1-26
  - Update Intel CPU microde for 06-3f-02, 06-4f-01, and 06-55-04
  - Resolves: #1527360
* Wed Nov 22 2017 Petr Oros <poros@redhat.com> - 2.1-25
  - Update to upstream 2.1-14. Intel CPU microcode update to 20171117.
  - Resolves: #1457522
* Tue Oct 17 2017 Petr Oros <poros@redhat.com> - 2.1-24
  - Fix upstream URL
  - Resolves: #1502360
* Fri Jul 14 2017 Petr Oros <poros@redhat.com> - 2.1-23
  - Update to upstream 2.1-13. Intel CPU microcode update to 20170707.
  - Resolves: #1457522
* Wed May 24 2017 Petr Oros <poros@redhat.com> - 2.1-22
  - Update to upstream 2.1-12. Intel CPU microcode update to 20170511.
  - Resolves: #1384218
* Tue Mar 07 2017 Petr Oros <poros@redhat.com> - 2.1-21
  - Rpm scriptlets should only rebuild the current kernel's initrd.
  - Resolves: #1420180
* Wed Jan 18 2017 Petr Oros <poros@redhat.com> - 2.1-20
  - Fix issue with hot microcode cpu reload.
  - Resolves: #1411232
* Mon Jan 09 2017 Petr Oros <poros@redhat.com> - 2.1-19
  - Fix broken quoting in ExecStart line.
  - Resolves: #1411232
* Fri Dec 16 2016 Petr Oros <poros@redhat.com> - 2.1-18
  - Fix issue with hot microcode cpu reload.
  - Resolves: #1398698
* Wed Nov 30 2016 Petr Oros <poros@redhat.com> - 2.1-17
  - Move dracut call into posttrans phase.
  - Resolves: #1398698
* Thu Jul 21 2016 Petr Oros <poros@redhat.com> - 2.1-16
  - Update to upstream 2.1-10. Intel CPU microcode update to 20160714.
  - Resolves: #1358047
* Wed Jun 29 2016 Petr Oros <poros@redhat.com> - 2.1-15
  - Load CPU microcode update only on supproted systems.
  - Resolves: #1307179
* Fri Jun 24 2016 Petr Oros <poros@redhat.com> - 2.1-14
  - Update to upstream 2.1-9. Intel CPU microcode update to 20160607.
  - Resolves: #1253106
* Thu May 19 2016 Petr Oros <poros@redhat.com> - 2.1-13
  - Run dracut -f for all kernels.
  - Resolves: #1292158
* Fri Jul 03 2015 Petr Oros <poros@redhat.com> - 2.1-12
  - Update to upstream 2.1-7. Intel CPU microcode update to 20150121.
  - Resolves: #1174983
* Fri Oct 10 2014 Petr Oros <poros@redhat.com> - 2.1-11
  - Run dracut -f after install microcode for update initramfs.
  - Resolves: #1151192
* Tue Sep 30 2014 Petr Oros <poros@redhat.com> - 2.1-10
  - Update to upstream 2.1-6. Intel CPU microcode update to 20140913.
  - Resolves: #1142302
* Tue Jul 15 2014 Petr Oros <poros@redhat.com> - 2.1-9
  - Update to upstream 2.1-5. Intel CPU microcode update to 20140624.
  - Resolves: #1113396
* Tue Jun 03 2014 Petr Oros <poros@redhat.com> - 2.1-8
  - Fix bogus time in changelog
  - Resolves: #1085117
* Tue Jun 03 2014 Petr Oros <poros@redhat.com> - 2.1-8
  - Update to upstream 2.1-4. Intel CPU microcode update to 20140430.
  - Resolves: #1085117
* Wed Mar 12 2014 Anton Arapov <anton@redhat.com> - 2.1-7.1
  - Fix the microcode's behaviour in virtual environment.
* Fri Feb 28 2014 Anton Arapov <anton@redhat.com> - 2.1-7
  - Fix the microcode's dracut configuration file location.
* Tue Feb 18 2014 Anton Arapov <anton@redhat.com> - 2.1-6
  - Enable early microcode capabilities. Systemd and Dracut support. (Jeff Bastian)
* Fri Jan 24 2014 Anton Arapov <anton@redhat.com> - 2.1-5
  - Update to upstream 2.1-3. Intel CPU microcode update to 20140122.
* Fri Dec 27 2013 Daniel Mach <dmach@redhat.com> - 2:2.1-4
  - Mass rebuild 2013-12-27
* Mon Sep 09 2013 Anton Arapov <anton@redhat.com> 2.1-3
  - Imported to RHEL tree
* Mon Sep 09 2013 Anton Arapov <anton@redhat.com> 2.1-2
  - Update to upstream 2.1-2.
* Wed Aug 14 2013 Anton Arapov <anton@redhat.com> 2.1-1
  - Update to upstream 2.1-1.
* Sat Jul 27 2013 Anton Arapov <anton@redhat.com> 2.1-0
  - Update to upstream 2.1. AMD microcode has been removed, find it in linux-firmware.
* Wed Apr 03 2013 Anton Arapov <anton@redhat.com> 2.0-3.1
  - Update to upstream 2.0-3
* Thu Feb 14 2013 Fedora Release Engineering <rel-eng@lists.fedoraproject.org> - 2:2.0-3
  - Rebuilt for https://fedoraproject.org/wiki/Fedora_19_Mass_Rebuild
* Wed Oct 17 2012 Anton Arapov <anton@redhat.com> 2.0-2
  - Update to upstream 2.0-2
* Tue Oct 02 2012 Anton Arapov <anton@redhat.com> 2.0-1
  - Update to upstream 2.0-1
* Mon Aug 06 2012 Anton Arapov <anton@redhat.com> 2.0
  - Update to upstream 2.0
* Wed Jul 25 2012 Anton Arapov <anton@redhat.com> 1.18-1
  - Update to upstream 1.18
* Fri Jul 20 2012 Fedora Release Engineering <rel-eng@lists.fedoraproject.org> - 1:1.17-26
  - Rebuilt for https://fedoraproject.org/wiki/Fedora_18_Mass_Rebuild
* Thu Jun 07 2012 Anton Arapov <anton@redhat.com> 1.17-25
  - Update to microcode-20120606.dat
* Tue Feb 07 2012 Anton Arapov <anton@redhat.com> 1.17-24
  - Update to amd-ucode-2012-01-17.tar
* Fri Jan 13 2012 Fedora Release Engineering <rel-eng@lists.fedoraproject.org> - 1:1.17-22
  - Rebuilt for https://fedoraproject.org/wiki/Fedora_17_Mass_Rebuild
* Thu Dec 22 2011 Anton Arapov <anton@redhat.com> 1.17-21
  - Fix a segfault that may be triggered by very long parameter [#768803]
* Tue Dec 13 2011 Anton Arapov <anton@redhat.com> 1.17-20
  - Update to microcode-20111110.dat
* Tue Sep 27 2011 Anton Arapov <anton@redhat.com> 1.17-19
  - Update to microcode-20110915.dat
* Thu Aug 04 2011 Anton Arapov <anton@redhat.com> 1.17-18
  - Ship splitted microcode for Intel CPUs [#690930]
  - Include tool for splitting microcode for Intl CPUs (Kay Sievers )
* Thu Jun 30 2011 Anton Arapov <anton@redhat.com> 1.17-17
  - Fix udev rules (Dave Jones ) [#690930]
* Thu May 12 2011 Anton Arapov <anton@redhat.com> 1.17-14
  - Update to microcode-20110428.dat
* Thu Mar 24 2011 Anton Arapov <anton@redhat.com> 1.17-13
  - fix memory leak.
* Mon Mar 07 2011 Anton Arapov <anton@redhat.com> 1.17-12
  - Update to amd-ucode-2011-01-11.tar
* Tue Feb 08 2011 Fedora Release Engineering <rel-eng@lists.fedoraproject.org> - 1:1.17-11
  - Rebuilt for https://fedoraproject.org/wiki/Fedora_15_Mass_Rebuild
* Wed Jan 19 2011 Anton Arapov <anton@redhat.com> 1.17-10
  - manpage fix (John Bradshaw ) [#670879]
* Wed Jan 05 2011 Anton Arapov <anton@redhat.com> 1.17-9
  - Update to microcode-20101123.dat
* Mon Nov 01 2010 Anton Arapov <anton@redhat.com> 1.17-8
  - Update to microcode-20100914.dat
* Wed Sep 29 2010 jkeating - 1:1.17-7
  - Rebuilt for gcc bug 634757
* Wed Sep 15 2010 Anton Arapov <anton@redhat.com> 1.17-6
  - Update to microcode-20100826.dat
* Tue Sep 07 2010 Toshio Kuratomi <toshio@fedoraproject.org> 1.17-5
  - Fix license tag: bz#450491
* Fri Aug 27 2010 Dave Jones <davej@redhat.com> 1.17-4
  - Update to microcode-20100826.dat
* Tue Mar 23 2010 Anton Arapov <anton@redhat.com> 1.17-3
  - Fix the udev rules (Harald Hoyer )
* Mon Mar 22 2010 Anton Arapov <anton@redhat.com> 1.17-2
  - Make microcode_ctl event driven (Bill Nottingham ) [#479898]
* Thu Feb 11 2010 Dave Jones <davej@redhat.com> 1.17-1.58
  - Update to microcode-20100209.dat
* Fri Dec 04 2009 Kyle McMartin <kyle@redhat.com> 1.17-1.57
  - Fix duplicate message pointed out by Edward Sheldrake.
* Wed Dec 02 2009 Kyle McMartin <kyle@redhat.com> 1.17-1.56
  - Add AMD x86/x86-64 microcode. (Dated: 2009-10-09)
    Doesn't need microcode_ctl modifications as it's loaded by
    request_firmware() like any other sensible driver.
  - Eventually, this AMD firmware can probably live inside
    kernel-firmware once it is split out.
* Wed Sep 30 2009 Dave Jones <davej@redhat.com>
  - Update to microcode-20090927.dat
* Fri Sep 11 2009 Dave Jones <davej@redhat.com>
  - Remove some unnecessary code from the init script.
* Sat Jul 25 2009 Fedora Release Engineering <rel-eng@lists.fedoraproject.org> - 1:1.17-1.52.1
  - Rebuilt for https://fedoraproject.org/wiki/Fedora_12_Mass_Rebuild
* Thu Jun 25 2009 Dave Jones <davej@redhat.com>
  - Shorten sleep time during init.
    This really needs to be replaced with proper udev hooks, but this is
    a quick interim fix.
* Wed Jun 03 2009 Kyle McMartin <kyle@redhat.com> 1:1.17-1.50
  - Change ExclusiveArch to i586 instead of i386. Resolves rhbz#497711.
* Wed May 13 2009 Dave Jones <davej@redhat.com>
  - update to microcode 20090330
* Wed Feb 25 2009 Fedora Release Engineering <rel-eng@lists.fedoraproject.org> - 1:1.17-1.46.1
  - Rebuilt for https://fedoraproject.org/wiki/Fedora_11_Mass_Rebuild
* Fri Sep 12 2008 Dave Jones <davej@redhat.com>
  - update to microcode 20080910
* Tue Apr 01 2008 Jarod Wilson <jwilson@redhat.com>
  - Update to microcode 20080401
* Sat Mar 29 2008 Dave Jones <davej@redhat.com>
  - Update to microcode 20080220
  - Fix rpmlint warnings in specfile.
* Mon Mar 17 2008 Dave Jones <davej@redhat.com>
  - specfile cleanups.
* Fri Feb 22 2008 Jarod Wilson <jwilson@redhat.com>
  - Use /lib/firmware instead of /etc/firmware
* Wed Feb 13 2008 Jarod Wilson <jwilson@redhat.com>
  - Fix permissions on microcode.dat
* Thu Feb 07 2008 Jarod Wilson <jwilson@redhat.com>
  - Spec cleanup and macro standardization.
  - Update license
  - Update microcode data file to 20080131 revision.
* Mon Jul 02 2007 Dave Jones <davej@redhat.com>
  - Update to upstream 1.17
* Thu Oct 12 2006 Jon Masters <jcm@redhat.com>
  - BZ209455 fixes.
* Mon Jul 17 2006 Jesse Keating <jkeating@redhat.com>
  - rebuild
* Fri Jun 16 2006 Bill Nottingham <notting@redhat.com>
  - remove kudzu requirement
  - add prereq for coreutils, awk, grep
* Thu Feb 09 2006 Dave Jones <davej@redhat.com>
  - rebuild.
* Fri Jan 27 2006 Dave Jones <davej@redhat.com>
  - Update to upstream 1.13
* Fri Dec 16 2005 Jesse Keating <jkeating@redhat.com>
  - rebuilt for new gcj
* Fri Dec 09 2005 Jesse Keating <jkeating@redhat.com>
  - rebuilt
* Mon Nov 14 2005 Dave Jones <davej@redhat.com>
  - initscript tweaks.
* Tue Sep 13 2005 Dave Jones <davej@redhat.com>
  - Update to upstream 1.12
* Wed Aug 17 2005 Dave Jones <davej@redhat.com>
  - Check for device node *after* loading the module. (#157672)
* Tue Mar 01 2005 Dave Jones <davej@redhat.com>
  - Rebuild for gcc4
* Thu Feb 17 2005 Dave Jones <davej@redhat.com>
  - s/Serial/Epoch/
* Tue Jan 25 2005 Dave Jones <davej@redhat.com>
  - Drop the node creation/deletion change from previous release.
    It'll cause grief with selinux, and was a hack to get around
    a udev shortcoming that should be fixed properly.
* Fri Jan 21 2005 Dave Jones <davej@redhat.com>
  - Create/remove the /dev/cpu/microcode dev node as needed.
  - Use correct path again for the microcode.dat.
  - Remove some no longer needed tests in the init script.
* Fri Jan 14 2005 Dave Jones <davej@redhat.com>
  - Only enable microcode_ctl service if the CPU is capable.
  - Prevent microcode_ctl getting restarted multiple times on initlevel change (#141581)
  - Make restart/reload work properly
  - Do nothing if not started by root.
* Wed Jan 12 2005 Dave Jones <davej@redhat.com>
  - Adjust dev node location. (#144963)
* Tue Jan 11 2005 Dave Jones <davej@redhat.com>
  - Load/Remove microcode module in initscript.
* Mon Jan 10 2005 Dave Jones <davej@redhat.com>
  - Update to upstream 1.11 release.
* Sat Dec 18 2004 Dave Jones <davej@redhat.com>
  - Initial packaging, based upon kernel-utils.

Files

/lib/firmware/intel-ucode
/usr/lib/dracut/dracut.conf.d/01-microcode.conf
/usr/lib/dracut/dracut.conf.d/99-microcode-override.conf
/usr/lib/dracut/modules.d/99microcode_ctl-fw_dir_override
/usr/lib/dracut/modules.d/99microcode_ctl-fw_dir_override/module-setup.sh
/usr/lib/systemd/system/microcode.service
/usr/libexec/microcode_ctl
/usr/libexec/microcode_ctl/check_caveats
/usr/libexec/microcode_ctl/reload_microcode
/usr/libexec/microcode_ctl/update_ucode
/usr/sbin/intel-microcode2ucode
/usr/share/doc/microcode_ctl
/usr/share/doc/microcode_ctl/LICENSE.intel-ucode
/usr/share/doc/microcode_ctl/README
/usr/share/doc/microcode_ctl/README.caveats
/usr/share/doc/microcode_ctl/README.intel-ucode
/usr/share/doc/microcode_ctl/RELEASE_NOTES.intel-ucode
/usr/share/doc/microcode_ctl/SECURITY.intel-ucode
/usr/share/doc/microcode_ctl/SUMMARY.intel-ucode
/usr/share/doc/microcode_ctl/caveats
/usr/share/doc/microcode_ctl/caveats/06-2d-07_readme
/usr/share/doc/microcode_ctl/caveats/06-4e-03_readme
/usr/share/doc/microcode_ctl/caveats/06-4f-01_readme
/usr/share/doc/microcode_ctl/caveats/06-55-04_readme
/usr/share/doc/microcode_ctl/caveats/06-5e-03_readme
/usr/share/doc/microcode_ctl/caveats/06-8c-01_readme
/usr/share/doc/microcode_ctl/caveats/intel_readme
/usr/share/man/man8/intel-microcode2ucode.8.gz
/usr/share/microcode_ctl
/usr/share/microcode_ctl/intel-ucode
/usr/share/microcode_ctl/ucode_with_caveats
/usr/share/microcode_ctl/ucode_with_caveats/intel
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-2d-07
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-2d-07/config
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-2d-07/disclaimer
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-2d-07/intel-ucode
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-2d-07/intel-ucode/06-2d-07
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-2d-07/readme
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-4e-03
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-4e-03/config
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-4e-03/disclaimer
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-4e-03/intel-ucode
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-4e-03/intel-ucode/06-4e-03
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-4e-03/readme
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-4f-01
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-4f-01/config
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-4f-01/disclaimer
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-4f-01/intel-ucode
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-4f-01/intel-ucode/06-4f-01
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-4f-01/readme
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-55-04
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-55-04/config
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-55-04/disclaimer
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-55-04/intel-ucode
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-55-04/intel-ucode/06-55-04
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-55-04/readme
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-5e-03
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-5e-03/config
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-5e-03/disclaimer
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-5e-03/intel-ucode
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-5e-03/intel-ucode/06-5e-03
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-5e-03/readme
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-8c-01
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-8c-01/config
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-8c-01/disclaimer
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-8c-01/intel-ucode
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-8c-01/intel-ucode/06-8c-01
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-8c-01/readme
/usr/share/microcode_ctl/ucode_with_caveats/intel/config
/usr/share/microcode_ctl/ucode_with_caveats/intel/disclaimer
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-03-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-05-00
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-05-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-05-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-05-03
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-06-00
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-06-05
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-06-0a
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-06-0d
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-07-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-07-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-07-03
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-08-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-08-03
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-08-06
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-08-0a
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-09-05
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0a-00
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0a-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0b-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0b-04
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0d-06
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0e-08
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0e-0c
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0f-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0f-06
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0f-07
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0f-0a
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0f-0b
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0f-0d
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-16-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-17-06
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-17-07
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-17-0a
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-1a-04
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-1a-05
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-1c-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-1c-0a
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-1d-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-1e-05
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-25-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-25-05
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-26-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-2a-07
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-2c-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-2d-06
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-2d-07
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-2e-06
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-2f-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-37-08
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-37-09
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-3a-09
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-3c-03
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-3d-04
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-3e-04
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-3e-06
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-3e-07
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-3f-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-3f-04
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-45-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-46-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-47-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-4c-03
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-4c-04
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-4d-08
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-4e-03
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-55-03
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-55-04
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-55-05
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-55-06
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-55-07
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-55-0b
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-56-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-56-03
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-56-04
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-56-05
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-5c-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-5c-09
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-5c-0a
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-5e-03
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-5f-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-66-03
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-6a-05
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-6a-06
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-7a-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-7a-08
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-7e-05
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-8a-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-8c-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-8d-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-8e-09
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-8e-0a
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-8e-0b
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-8e-0c
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-96-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-9c-00
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-9e-09
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-9e-0a
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-9e-0b
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-9e-0c
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-9e-0d
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-a5-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-a5-03
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-a5-05
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-a6-00
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-a6-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-a7-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-00-07
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-00-0a
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-01-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-02-04
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-02-05
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-02-06
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-02-07
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-02-09
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-03-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-03-03
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-03-04
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-04-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-04-03
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-04-04
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-04-07
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-04-08
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-04-09
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-04-0a
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-06-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-06-04
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-06-05
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-06-08
/usr/share/microcode_ctl/ucode_with_caveats/intel/readme


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Fabrice Bellet, Tue Aug 16 01:59:29 2022